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Here is a list of some of our more recent engineering projects that we have worked on:

Currently Writing Display Driver in Object Orientated C for use in industrial / military controls and also for smart meter / utilities / energy markets, and automotive/vehicle markets.
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Currently working on Design of Isolated CAN J1939 onto Freescale MCF5213 MCU for power generator equipment.  Evaluation of CAN software considerations, and Hardware EMC/EMI.  Circuit design in Zuken CR-5000.  Debug of CAN interface using Vector Informatic CAN Scope, circuit simulation using Orcad.  Debug of AC power line metering chip firmware calibration process.  Debug of Embedded Firmware and inter-processor messaging and uart communications.
Kinetis ARM M4 CANbus Controller
FPGA Design Embedding NIOS II microprocessors inside of FPGA, designing Video and Audio Intellectual Property (IP) inside of  FPGAs  for High Definition Telecommunications equipment and cameras,  utilizing high speed serial SDI video (3G) over fiber optic interface utilizing LVDS SERDES. C programming of I2C, SPI, and UART communications and small control loop RTOS of embedded NIOS II.  System Architecture of overall operation and of creation of proprietary communication interface and command parser of NIOS II.  Programming and register configuration of video codecs,  encoders and decoders for Analog Video, and high definition HDMI, DVI, SDI video. 
 

Acoustic Instrumentation with ARM Processor, Graphical LCD screen, RS485, SPI, FERam, 4 Analog Inputs, ten bit A/D converter, and CPLD doing DMA memory control storing samples from AtoD converter into SRAM,  2 switching power supplys .  Circuit Design, CPLD design in VHDL, C programming for USB driver, Runtime applications, and Nand Flash File System, Circuit Board Layout

ARM Microprocessor with CPLD Memory Controller
 
Currently working on CAN / LIN Development Board with Graphical LCD screen, RS232, CAN, LIN, 12 Digital Outputs, 12 Digital Inputs, 8 - ten bit A/D converters, and Variable 2Amp switching power supply 8v-15v to simulate load conditions on 12volt automotive lead acid battery.  Circuit Design, CPLD design in VHDL, C programming, Circuit Board Layout.
CAN Communications Controller with LCD and CPLD
 
Hardware circuit design, Firmware design in C for Freescale 8bit Micro, Circuit board layout In EAGLE
Livewell Timer in Un-Potted Assembly
 
Industrial Sensor: CCD interfaced to Analog Devces DSP through flex circuit, converts optical data to digital information and feed it to Atmel 16bit Micro and Xilinx CPLD to send data out a modulated serial communications channel.  Root Cause / Debugging of Manufacturing problems,  Conversion of assembly to RoHS process, New power supply design, Xilinx CPLD programming in VHDL,  CAD Layout of test fixture circuit board, Compatibility testing of Laser diode for RoHS solder process.
Optical Image Processing DSP Micro Assembly
 
Industrial Logic Controller: Power PC based design that operates up to 50MHz.  16MB of zero wait state SDram with drop in provisions for 64MB.  8 MB of 2 bank, Simultaneous Read/Write Flash memory with drop in provisions for  64MB.  10/100MB Ethernet physical layer interface.  Interface to 4 line x 20 character VFD display.  Zero wait state, Dual port ram interface to AMD186ES microprocessor and Allen Bradley Control Net ASIC.  Echelon LONworks adapter circuit design.  Interface to Membrane keypad and LED display.  
Multiple Xilinx CPLD design and simulation in VHDL using timers, counters, registers, and combinatorial logic to perform functions of state machines, access arbitration, address decoding, memory timing, peripheral control, bus error checking, watchdog control, variable volume & tone piezoelectric buzzer design, and proprietary design.
PowerPC Communications Controller with FLASH and RAM
 
Intrinsically Safe Handheld Computer:  Designed 16MB Flash memory module to interface to main board.  Re-designed main board for Modem chip communication enhancements.  Circuit board layout guidance to meet intrinsic safety guidelines of FM, CSA, and CENELEC. Circuit board layout verification.